Superconducting SFQ VLSI Workshop (SSV 2014)

Program (Schedule)

Program in PDF format (4 pages)

Monday, December 1

13:00-13:10
Opening Remarks
H. Terai (NICT)

Oral Session I (13:10-15:05)     Chairperson: H. Terai

13:10-13:40
[I-1] J. Chen (Invited), Nanjing University
"Superconducting Nanowire Single Photon Detectors and Their Applications"
13:40-14:05
[I-2] M. Tanaka (Invited), Nagoya University
"Design of RSFQ Microprocessors Integrated with RAMs Based on Bit-Serial Processing"
14:05-15:05
[I-3] K. Nakajima (Invited), Tohoku University
"Over View from Josephson Transmission Line to SFQ Logic Circuit and Inverse Function Delay-Less Model"

Coffee Break (15:05-15:20)

Short Poster Presentation (15:20-16:10)

Poster Session (16:10-17:30)

List of Poster Papers

Banquet at Cafeteria (18:00-19:30)

Tuesday, December 2

Oral Session II (9:15-10:55)     Chairperson: Y. Yamanashi

9:15-9:45
[I-4] M. Aprili (Invited), Laboratory of Solid State Physics, France
"Hybrid Superconductor/Ferromagnet Devices"
9:45-10:10
[I-5] T. Yamashita (Invited), NICT
"Classical and Quantum Superconducting Computing Devices and Their Fusion with Spintronics"
10:10-10:25
[O-1] K. Kajino, S. Miki, T. Yamashita, and H. Terai, NICT
"Error-Free Operation of Nanowire Optical-to-Electrical Converter with SFQ Circuits in a Cryocooler System"
10:25-10:40
[O-2] H. Ito, S. Taniguchi, K. Ishikawa, H. Akaike, and A. Fujimaki, Nagoya University
"Effects of PdNi Ferromagnetic Interlayers in Nb based Josephson Junctions"
10:40-10:55
[O-3] M. Hidaka, S. Nagasawa, T. Satoh, and K. Hinode, AIST
"Leakage Current Caused by Fine Particles Underneath Nb/AlOx/Nb Josephson Junction"

Coffee Break (10:55-11:15)

Oral Session III (11:15-12:30)     Chairperson: M. Tanaka

11:15-11:30
[O-4] Y. Yamanashi, K. Masubuchi, and N. Yoshikawa, Yokohama National University
"Statistical Analysis of the Relationship between Timing Margin and the Error Rate of Single-Flux-Quantum Logic Circuits"
11:30-11:45
[O-5] G. Tang, K. Takagi, and N. Takagi, Kyoto University
"Comparison of Bit-Slice Arithmetic Logic Units for 32-bit RSFQ Microprocessors"
11:45-12:00
[O-6] K. Sawada, T. Watanabe, Y. Urai, Y. Mutoh, and Y. Mizugaki, The University of Electro-Communications
"Splitter-Based SFQ Sequential Read Only Memory"
12:00-12:15
[O-7] Y. Sakashita, Y. Yamanashi, and N. Yoshikawa, Yokohama National University
"Investigation on Component Circuits for the SFQ FFT Processor using the 10 kA/cm2 Nb Process"
12:15-12:30
[O-8] N. Takeuchi, NICT, Research Fellow of JSPS; Y. Yamanashi, and N. Yoshikawa, Yokohama National University
"Recent Progress Towards a Reversible Computer using Adiabatic Superconductor Logic"
12:30-12:35
Closing Remarks
A. Fujimaki (Nagoya University)